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(ELEC202)[2005](f)final~wctsangaa^_69819.pdf
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ELEC 202 Electronic Circuits II

Final Examination
Dec., 19, 2005 (Monday) 12:30pm C 3:30pm LG1031
Examiner: Dr. Ki Wing-Hung
Name: Chinese Name:
Student ID:
Instructions:
(1)
This is a closed book examination.

(2)
Calculators are allowed.

(3)
Answer all questions in the booklet provided. Request for additional sheets from proctors only if necessary.

(4)
Show all your calculations. No marks will be given for unjustified answers.

(5)
Do your own work. Any form of cheating is a violation of academic integrity, and will be dealt with accordingly.


Question Maximum Points Points
1 8
2 6
3 16
4 16
5 14
6 8
7 16
8 16
Total 100

The following equations may be useful:
kn' = nCox kn = nCox(W/L) For Vds < Vgs C Vtn Id = nCox(W/L)[(Vgs C Vtn)Vds C .Vds2] For Vds > Vgs C Vtn Id = .nCox(W/L)(Vgs C Vtn)2(1 + nVds)

. b b2 . 4ac
For ax2 + bx + c = 0 x1,2 = 2a
For a capacitor, ic = C dt dvc , or .ic = C t vc . .
HKUST 2005 Fall 1 Ki

ELEC 202 Electronic Circuits II
(1) Bias Circuit 8 marks (1a) For Fig.1a, compute R1 and Vo1 such that the bias current is Ib = 24A, 4 marks given that nCox = 60A/V2, (W/L)n = 10/2, Vtn = 0.8V and n = 0/V. 6V


Vo1
Fig.1a
(1b) The bias voltage Vo1 is used to bias NMOS transistors. Next, the circuit 4 marks designer decided to obtain a bias voltage for PMOS transistors, too. With reference to Fig.1b, compute (W/L)p and R2 such that Ib = 24A and Vo1 is the same as in (1a), given that pCox = 24A/V2, |Vtp| = 0.75V, |p| = 0/V, gate overdrive voltage for Mp is 0.25V and Lp = 2 units.

Vo2
Vo1
Fig.1b
(2) Fig.2 shows a self-biased Widlar current mirror. Neglect channel length 6 marks modulation, and given that the overdrive voltage of M1 is 100mV, that is, .V = Vgs1 C Vtn = 100mV, and I = 100A, compute R.
Vdd

ELEC 202 Electronic Circuits II

(3) Single Transistor Amplifier 16 marks
(3a) Fig.3 shows an inverting amplifier with degeneracy. Assume it is biased 2 marks properly such that the transistor Mn is operating in the active region, and Vo is biased at Vdd/2, draw the small signal model of the amplifier.
Vdd
Rd Vo + vo
MnVi + vi
Vs
Rs

Fig.3
(3b) From the small signal model obtained in (3a), derive the gain of the 4 marks amplifier, A = vo/vi.
(3c) Compute the power supply rejection of Vdd, that is, compute 4 marks Add = vo
ddv Note that in computing Add, the input vi is set to zero, and a small signal vdd is injected at (or added to) Vdd.
(3d) With the dc bias current Ib = 200A, overdrive voltage Vov = 0.2V, n = 0.05/V, Rd = 10k. and Rs = 1k., compute the numerical value of A = vo/vi and Add = vo/vdd. 4 marks
(3e) Compute the power supply rejection ratio PSRR+ and express the result in dB. 2 marks

ELEC 202 Electronic Circuits II

(4) Fig.4a shows an inverting amplifier with an active load. 16 marks
Vo
vi