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(ELEC151)[2004](s)final~xchen^_10003.pdf
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ELEC151 DIGITAL CIRCUITS AND SYSTEMS

FINAL EXAMINATION

Date: 16-April-2004
Time: 4:30C 6:50 (2 hours 20 mins)
Place: LG4
Student Name:

Student Number:

Grade: 1.
2.

3.

4.


5. Total:
ANSWER ONLY ON THE EXAMINATION PAPERS
14 PAGES, 5 QUESTIONS AND 40 MARKS
Question 1 7
Question 2 7
Question 3 8
Question 4 6
Question 5 12
Total 40

Question 1 Transistor level implementation [7 points]
Given a function F = (A+B+C)(D+E)G
a) Implement the function F using CMOS transistor level schematic. (5 points)

b) How many transistors do I need in order to implement F using OR-AND configuration? Show your circuit at the gate level. (1 point)
c) How many transistors do I need in order to implement F using NOR-NOR configuration? Show your circuit at the gate level. (1 point)
Question 2 Read-Only Memory (ROM) [7 points]
a) Given the following ROM, WL represents the word lines and BL represents the output bit lines.


i) What type of ROM is it? (0.5 points)
ii) What is the bit data stored in each location and what are the values of WL in order to read each data stored? Fill in the table below (2 points)
Location WL[0] WL[1] WL[2] WL[3] BL[0] Data stored BL[1] BL[2] BL[3]
0
1
2
3

b) Given the following ROM, WL represents the word lines and BL represents the output bit lines.

V D

Pull-up devices
WL [0]


GND
WL [1]

WL [2]


GND
WL [3]


BL [0] BL [1] BL [2] BL [3]

i) What type of ROM is it? (0.5 points)
ii) What is the bit data stored in each location and what are the values of WL in order to read each data stored? Fill in the table below. (2 points)
Location WL[0] WL[1] WL[2] WL[3] BL[0] Data stored BL[1] BL[2] BL[3]
0
1
2
3

c) Give one advantage and one disadvantage of MOS NAND ROM compared to MOS NOR ROM. Briefly explain. (2 points) Advantage:_______________________________________________________
Disadvantage:___________________________________________________________
Question 3 Programmable Logic Array (PLA) [8 points]
Given the programmable logic array (PLA) shown below, indicate where fuses should be retained using xs in order to implement the functions F1 and F2. You MUST use minimum number of fuses. Show all your steps.
F (A, B, C) = (1,3,5,6)
1
F (A, B, C) = (0,2,3,4)
2
Draw the fuse connections below or in the next page.


Question 4 Programmable Logic Array (PLA) [6 points]
Using the array shown below, draw the transistor level Pseudo-NMOS PLA that realizes the functions f0, f1 and f2.
f0 = x0 + x1 f1 = x0 x1 + x2 x3 + x0 f2 = x0 x1 x2 + x3
Complete the design using the array below or in the next page.


Question 5 Finite State Machine (FSM) [12 points]
Given a state-transition table:
Present State Next State
Output Z x =0 x =1
x =0 x =1 a
ga
10 b
dc
00 c
fe
00 d
ga
10 e
dc
00 f
f