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(ELEC151)[2004](f)final~xchen^_10002.pdf
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The Hong Kong University of Science and Technology
Department of Electrical and Electronic Engineering

ELEC151 DIGITAL CIRCUITS AND SYSTEMS

MID-TERM EXAMINATION #2

Date: 16-April-2004
Time: 3:05C 3:55 (50 mins)
Place: Lecture Theatre B

Student Name:

Student Number:


Grade: 1.
2.
Total:

ANSWER ONLY ON THE EXAMINATION PAPERS
INCLUDING THE BACKSIDE

7 PAGES, 2 QUESTIONS AND 15 MARKS

Question 1 10
Question 2 5
Total 15

Question 1. FSM implementation (10 marks)
A Moore machine has one input (X) and one output (Z). The output should be 1 if the
total number of 0s received at the input is odd and the total number of 1s received is an
even number greater than 0. This machine can be implemented in exactly 6 states.

The states are defined in the following table:
State (ABC) No. of 0s received No. of 1s received
S0 = 000 (reset) Even 0
S1 = 001 Odd 0
S2 = 010 Even Even (>0)
S3 = 011 Even Odd
S4 = 100 Odd Even (>0)
S5 = 101 Odd Odd

a) Fill in the column Z in the table below: (0.5 points)
State (ABC) No. of 0s received No. of 1s received Output (Z)
S0 = 000 (reset) Even 0
S1 = 001 Odd 0
S2 = 010 Even Even (>0)
S3 = 011 Even Odd
S4 = 100 Odd Even (>0)
S5 = 101 Odd Odd

b) Complete the state transition diagram below. (3 points) Note that you should complete the outputs and next state transitions knowing that this is a Moore machine.
reset


S5=101 S3=011

S4=100 S2=010

c) Write down the state-transition table (includes: present state, input, next state, output and flip-flops inputs). Implement the Moore machine using D Flip-flops. (3 points)
Present state A B C Input Next state Output Flip-flop inputs


d) Derive the minimized excitation equations for the output and the flip-flops inputs used in your design. (2 points)
e) Draw the schematic diagram. (1.5 points)
Question 2. TTL IC Counters (Lab) (5 points)
Use one 74LS161 (*), one brand new 74LS162, and minimal number of gates (NAND gates and inverters only), to implement a 2-digits decimal counter that counts from 30, 31, 32, 33 39, 40, 41, 42, 43 59, 60, 61 to 68, 69 and repeats.
(*) Assume that the LOAD pin (pin 9) of the 74LS161 IC I am using is broken, so I cannot use this pin 9 in my design. Also assume that this pin is internally connected through a resistor to Vcc. This IC is functioning correctly.

Complete the design connections below or in the next page. Show all the connections.

7 10
2
6 5 4 3
9

1









Identify (write number here)

7 10 15
15

2 11 6
11 12 5
12 13 4
13 14 3
14 9 1







7 10
2
6 5 4 3

9

1






7 10
2
6 5 4 3
9

1