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(COMP180)2008_s_final_by_cs_gxx.pdf
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HONG KONG UNIVERSITY OF SCIENCE & TECHNOLOGY
Computer Organization (COMP 180)
Spring Semester, 2008
Final Examination
April 24, 2008

Name:__________ Solutions __________________ Student ID:

Email: Lab Section Number:


Instructions:

1. This examination paper consists of 15 pages, with 7 questions and 1 appendix reference page.

2. Please write your name, student ID, email and lab section number on this page.

3. Please answer all the questions in the spaces provided on the examination paper.

4. Please read each question very carefully, answer clearly and to the point. Make sure that your answers are neatly written.

5. Keep all pages stapled together.

6. The examination period will last for 3 hours.

7. Stop writing immediately when the time is up.




Question
Percentage %
Scores

1
20 (Basics)


2
15 (MIPS)


3
10 (Arithmetic)


4
20 (Single Cycle)


5
10 (Multi Cycle)


6
7 (Pipeline)


7
18 (Memory)


TOTAL
100






Question 1 Basics (20 marks)

a) True or False (10 marks)

Note: 1 mark for each correct answer, 0 mark for empty answer, -1 mark for each wrong answer until zero.

1) Shift left logical i digits for unsigned binary data is the same as an integer multiplication by 2 to power i (assuming no overflow)
Ans:__T__

2) Immediate addressing is used for conditional jump instructions. It gets the upper 16 bits of the target address from PC.
Ans:__F__

3) CPI for single-cycle implementation is 1.
Ans:__T__

4) The smallest positive number represented by IEEE754 single precision format is 0 00000001 00000000000000000000000
(should be 0 00000000 00000000000000000000001)
Ans:__F__

5) Pipelining helps to speed up the execution time of a single instruction.
(Pipelining helps the throughput, not the execution time of a single instruction)
Ans:__F__

6) Data hazards can be always avoided by adding forwarding path hardware to the pipeline.
(e.g. lw $s0, 100($t0) then add $t2, $s0, $t3)
Ans:__F__

7) The following 2 micro instructions are correct

Label
ALU
Control
SRC1
SRC2
Register
Control
Memory
PCWrite
Control
Sequencing
FETCH
ADD
PC
4

Read PC
ALU
Seq

ADD
PC
Ext
shift
READ


Dispatch 1

Ans:__T__

8) A twos complement overflow cant happen when a positive number is added with a negative number.
Ans:__T__

9) Control signals in multi-cycle implementation are generated solely based on the 6-bit opcode of the MIPS instruction.
(R format also uses func code)
Ans:__F__

10) The number of entries in the page table equals to the number of physical pages in the main memory.
Ans:__F__





b) Short Answers (10 marks)

b.1) Identify the addressing modes for the following three instructions (1.5 marks)


add $s0, $s1, $s